TY - JOUR
T1 - Design and Implementation of Artificial Intelligence Models Using Deep Neural Networks on Reconfigurable VLSI Systems for Autonomous Driving
AU - Muruganantham, S.
AU - Santhosh Kumar, C.
AU - Jacob, Mary
AU - Zukhra, Ismailova
AU - Kumar, Anil
AU - Bostani, Ali
AU - Sathishkumar, K.
PY - 2025/8/1
Y1 - 2025/8/1
N2 - Autonomous vehicles use object detection in real time, which is an important aspect of navigation and decision-making systems. Nevertheless, conventional computing architecture like CPUs and GPUs are usually inadequate to support the required latency, power consumption, and real-time demands within embedded automotive systems. This paper gives details of a generic design and implementation of object detection models using deep neural networks on reconfigurable very large-scale integration (VLSI) systems including field-programmable gate arrays (FPGAs). The quantized and compressed architecture of DNN are shown as combining a system-level co-design approach with an FPGA platform by means of optimized mapping of hardware and parallel dataflow design. The framework has been proposed based on low-latency, high-throughput, energy-efficient inference, which can be brought to the edge when safety is required. The process of simulation and hardware synthesis entails MATLAB, Simulink, HDL Coder, and Xilinx Vivado, with experimental analysis being carried out on real datasets, such as KITTI or BDD100K. Experiments show that indeed there is a huge gain in the number of inferences per second and resource consumption as well as power generations when compared to typical CPU/GPU deployment. The results support the conclusion on the usefulness of reconfigurable VLSI platforms as an alternative hardware solution to building autonomous driving systems by AI in the future.
AB - Autonomous vehicles use object detection in real time, which is an important aspect of navigation and decision-making systems. Nevertheless, conventional computing architecture like CPUs and GPUs are usually inadequate to support the required latency, power consumption, and real-time demands within embedded automotive systems. This paper gives details of a generic design and implementation of object detection models using deep neural networks on reconfigurable very large-scale integration (VLSI) systems including field-programmable gate arrays (FPGAs). The quantized and compressed architecture of DNN are shown as combining a system-level co-design approach with an FPGA platform by means of optimized mapping of hardware and parallel dataflow design. The framework has been proposed based on low-latency, high-throughput, energy-efficient inference, which can be brought to the edge when safety is required. The process of simulation and hardware synthesis entails MATLAB, Simulink, HDL Coder, and Xilinx Vivado, with experimental analysis being carried out on real datasets, such as KITTI or BDD100K. Experiments show that indeed there is a huge gain in the number of inferences per second and resource consumption as well as power generations when compared to typical CPU/GPU deployment. The results support the conclusion on the usefulness of reconfigurable VLSI platforms as an alternative hardware solution to building autonomous driving systems by AI in the future.
KW - Autonomous Driving
KW - Deep Neural Networks
KW - FPGA
KW - Object Detection
KW - Reconfigurable VLSI
UR - https://www.scopus.com/pages/publications/105014546150
U2 - 10.31838/JVCS/07.01.16
DO - 10.31838/JVCS/07.01.16
M3 - Article
AN - SCOPUS:105014546150
SN - 2582-1458
VL - 7
SP - 145
EP - 154
JO - Journal of VLSI Circuits and Systems
JF - Journal of VLSI Circuits and Systems
IS - 1
ER -